光流设计演示

This benchmark demonstrates a OpenCL implementation of the Lucas Kanade Optical Flow algorithm. The implementation is based on the following paper: Pyramidal Implementation of the Lucas Kanade Feature Tracker Description of the algorithm, by Jean-Yves Bouguet.

This design example implements a dense, non-iterative, non-pyramidal version with 52×52 window size. It was designed for platforms with smaller FPGA devices, specifically the Cyclone® V SoC Development Kit.

视频缩小演示

This example demonstrates an Open Computing Language (OpenCLTM) implementation of a fixed ratio (2/3) video downscaler. The example takes 1080p YUV 4:2:0 video, downscales it to 720p and displays the result on the screen.

This example implements a two-pass downscaler, where each pass downscales the input along the horizontal direction and outputs the result in a transposed order. Each pass invokes two kernels that communicate using Intel’s channels vendor extension. The partitioning into two kernels allows each kernel to efficiently access global memory.

适用于车载娱乐系统的基于Cyclone V的Displayport分流演示

In the recent development of automotive cockpit design, computer display is not only used for navigation, but also for telemetry (e.g. speedometer) and in-vehicle infotainment. Intel CPU with integrated graphics (GPU) doesn’t provide sufficient graphic outputs to meet the increasing demand for displays. For automotive infotainment system integrator, this demo illustrates the capability of Intel FPGA to complement Intel GPU to provide extended graphic outputs. The extended

Capability is made possible by utilizing the DisplayPort Multi-Stream Transport (MST) technology which allows multiple video streams to be transferred on a cable or transmission medium. The Intel FPGA replaces MST ASIC to split the multiple video streams from Intel GPU into multiple displays. From this demo, you learn the overview of DisplayPort protocol, pixel clock recovery and customer usage scenarios.

欢迎亲临展厅，与更多黑科技应用展示零距离互动

为加速FPGA人才培养，英特尔FPGA中国创新中心推出FPGA在线培训，FPGA培训以FPGA基础知识和开发设计为主，全方位落实开发语言、开发工具、配置电路等环节的详细教学，帮助学员夯实基础，助力人工智能开发，探寻FPGA在更广泛领域的应用。学员可足不出户参与学习，为自己赋能增值！

点击“FPGA培训”按钮，了解更多FPGA培训信息，注册报名后，开始学习！